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E C E 551: Digital System Design and Synthesis

  • Catalog Description:
    Introduction to the use of hardware description langages and automated synthesis in design. Advanced design principles. Verilog and VHDL description languages. Synthesis from hardware description languages. Timing-oriented synthesis. Relation of integrated circuit layout to timing-oriented design. Design for reuse.
  • Credits: 3
  • Prerequisites: ECE/Comp Sci 352 & Jr st
  • Official Course Description (pdf)

    Moodle and D2L are being retired. Already, many Engineering courses are in Canvas rather than Moodle. Rather than using the Moodle links below, it is recommended that you use the Learn@UW site (learnuw.wisc.edu) to gain access to all of the LSM choices available to campus.